The amount of power drawn by a computing device has become an important consideration in recent years, both for battery-powered devices (e.g., mobile devices) and those having other power sources. Various techniques have been proposed for decreasing the power consumption, and increasing the power saving, of computing devices. One such technique carried out by operating systems (OSs) is placing the processors (e.g., processor chips, or processor cores of a multi-core chip) of a computing device into an idle, low-power state when the processors are not being used, in these techniques, an entire chip may be placed in the idle state, or, in the case of multi-core chip, only some of the cores of a chip may be placed in the idle state. The amount of power drawn by a computing device has become an important consideration in recent years, both for battery-powered devices (e.g., mobile devices) and those having other power sources. Various techniques have been proposed for decreasing the power consumption, and increasing the power saving, of computing devices. One such technique carried out by operating systems (OSs) is placing the processors (e.g., processor chips, or processor cores of a multi-core chip) of a computing device into an idle, low-power state when the processors are not being used. In these techniques, an entire chip may be placed in the idle state, or, in the case of multi-core chip, only some of the cores of a chip may be placed in the idle state.
The power-saving that results from placing a processor into the idle state may vary between processors, and may be dependent on the functionality of that processor. For example, some processors may be adapted to wake from an idle state upon receipt of every interrupt signal. The processor may receive a clock interrupt signal at very short intervals (e.g., for some computing devices, about every 15 milliseconds) and wake from the idle state upon receipt of the clock interrupt to update its time records. Power-saving may be negligible if the processor is being woken from the idle state frequently.
Other processors may support an idle state which permits the processor to be placed into an idle state in which interrupt signals—including the clock interrupt—are masked/disabled. In this state, the processor may not wake for each interrupt, and interrupts like the clock interrupt may be skipped. By placing the processor into a state with interrupts disabled, the processor may remain in the idle state longer, rather than waking for each interrupt after a short time. Accordingly, some operating systems may only place a processor into an idle state when that processor supports an idle state that masks interrupts.
An operating system may place a processor into the idle state when it detects that there is no processing burden on that processor. An operating system may also use “core parking” when it detects that the total processing burden on a multi-core chip is low enough that the burden can be consolidated onto a subset of available cores, such that the newly-freed cores may be placed into the idle state.